PCB etch factor describes the relationship between vertical copper removal and sideways undercut during PCB etching. It helps explain why a finished copper trace may not have the same width or rectangular shape shown in the original Gerber data.
However, engineers do not always use the term “etch factor” consistently. Therefore, any useful calculation must first define the formula, the measurement points, and whether the width means the top, bottom, or average conductor width.
This article uses one clearly stated definition and shows how etch compensation affects both trace width and the remaining space between copper features.
| Buyer Question | Short Answer |
|---|---|
| Why does a finished trace differ from the Gerber width? | Etching removes copper vertically and laterally. |
| Can CAM compensate for the width loss? | Yes, within the manufacturer’s validated process window. |
| Does wider compensation affect spacing? | Yes. Increasing copper features reduces the space between them. |
| Can one etch factor apply to every layer? | No. Copper construction and processing differ by layer. |
| What should the buyer approve? | Critical geometry changes that affect impedance, clearance, RF behavior, or minimum spacing. |
What Is PCB Etch Factor?
For this article, PCB etch factor uses the following definition:
Etch Factor = Vertical Etch Depth ÷ Lateral Undercut On One Side
Or:
EF = D ÷ U
Where:
| Symbol | Meaning |
|---|---|
| EF | Etch factor |
| D | Vertical copper depth that the etchant must remove |
| U | Lateral undercut beneath the resist on one side |
Under this definition, a higher PCB etch factor means less lateral undercut for the same vertical etch depth.
For example, if the process removes 35 µm of copper vertically and undercuts 10 µm on each side:
EF = 35 µm ÷ 10 µm = 3.5
The trace loses approximately 20 µm across both sides if no other process bias or compensation applies.
Why The Definition Must Appear In The Report
Different PCB manufacturers, simulation tools, and technical articles may calculate etch factor differently. Some use copper thickness divided by one-sided undercut. Others use the difference between the top and bottom trace widths, an inverse ratio, a percentage, or a sidewall angle.
Siemens explains that the term lacks one consistent industry-wide implementation and that software tools may represent it as a ratio or an angle. Consequently, exchanging only an “etch factor of 3” without its formula can create ambiguity. Siemens: Etch Effects And Definition Differences
A useful manufacturing or inspection report should therefore state:
- The formula
- The copper depth
- Whether undercut applies to one side or both sides
- The top-width measurement
- The bottom-width measurement
- The resist or image width, when relevant
- The microsection orientation
- The layer and copper construction
Without these details, two parties may use the same number while describing different conductor shapes.
PCB Etch Factor Formula And Worked Example
Under the definition used in this article:
U = D ÷ EF
Because the etchant can attack both sides:
Approximate Total Lateral Width Loss = 2D ÷ EF
A simplified first estimate for the required image width becomes:
Image Width ≈ Target Finished Width + 2D ÷ EF
This equation illustrates the geometric relationship. It does not replace the PCB manufacturer’s production compensation table because imaging, developing, plating, etching, resist behavior, and measurement conventions introduce additional process bias.
Example: 35 µm Copper
Assume:
- Copper depth to remove: 35 µm
- Etch factor: 3.5
- Target finished top width: 100 µm
The calculation becomes:
Undercut Per Side = 35 µm ÷ 3.5 = 10 µm
Total Width Allowance = 2 × 10 µm = 20 µm
Therefore, the simplified image width would be approximately:
100 µm + 20 µm = 120 µm
| Calculation Item | Result |
|---|---|
| Vertical Etch Depth | 35 µm |
| Assumed Etch Factor | 3.5 |
| Undercut Per Side | 10 µm |
| Total Lateral Allowance | 20 µm |
| Target Finished Width | 100 µm |
| Simplified Image Width | 120 µm |
The Same Compensation Also Reduces Spacing
Suppose two adjacent features each expand by 10 µm toward the space between them. The production image loses 20 µm of available spacing:
Spacing Reduction = 10 µm + 10 µm = 20 µm
As a result, a design can have an acceptable target trace width but still fail fabrication review because the compensated image no longer provides enough process spacing.
Illustration With Thicker Copper
If the vertical copper depth increases to 70 µm while the assumed etch factor remains 3.5:
Undercut Per Side = 70 µm ÷ 3.5 = 20 µm
The approximate total allowance becomes 40 µm.
However, this example does not prove that a real production line will maintain the same etch factor at 35 µm and 70 µm. Thicker copper can require different dwell time, chemistry control, imaging rules, and minimum feature limits.
Evidence Boundary
The values above demonstrate the formula only. They do not represent a universal IPC tolerance, a guaranteed Haode capability, or a production compensation recipe.
A manufacturer must derive production compensation from measured process data for the relevant copper construction, layer type, feature density, and etching line.
Why Gerber Width Does Not Equal Finished Trace Width
Gerber files describe the two-dimensional images used for PCB fabrication, including copper-layer features. Ucamco, the organization responsible for the Gerber format, describes Gerber as the standard format for transferring PCB layer images. Ucamco Official Gerber Format
However, a Gerber aperture width does not directly describe the complete three-dimensional cross-section of the finished conductor.
Several widths may exist during manufacturing:
| Width | What It Describes |
|---|---|
| Design Width | Geometry created in the PCB layout software |
| Gerber Width | Two-dimensional feature transferred in the fabrication data |
| Compensated CAM Width | Geometry adjusted for the manufacturer’s process |
| Resist Width | Protected feature after imaging and developing |
| Finished Top Width | Width near one surface of the conductor |
| Finished Bottom Width | Width near the laminate interface |
| Average Width | Calculated or measured representative conductor width |
These values may differ.
Moreover, etching rarely creates a perfectly rectangular conductor. The finished trace can have a trapezoidal or curved sidewall profile. Therefore, a report that states only “finished width: 100 µm” remains incomplete when the measurement location matters.
Inner And Outer Layers Need Separate Review
Inner-layer copper and outer-layer copper do not necessarily pass through the same manufacturing sequence.
Inner layers commonly start with copper-clad laminate, receive an image, and then undergo etching. In contrast, outer layers usually undergo drilling, copper plating, pattern definition, additional plating, and final etching.
Consequently, the copper that the etchant must clear, the resist system, and the finished conductor profile can differ. A fabricator should not automatically apply one compensation value to every layer.
How PCB Etch Factor Changes Trace Width And Spacing
Etch compensation increases selected copper features in the production data so that lateral copper loss brings the finished features closer to their targets.
Eurocircuits describes this manufacturing practice as increasing tracks and other features to offset the sideways component of etching. Eurocircuits Front-End Data Preparation
However, the process creates a direct tradeoff:
More Copper Compensation → Wider Production Features → Less Production Spacing
Therefore, engineers must review PCB trace width and PCB trace spacing together.
Example Of A DFM Conflict
Consider a design with:
- Target trace width: 100 µm
- Target trace spacing: 100 µm
- Required compensation: 10 µm per exposed feature edge
If two adjacent traces expand toward the same gap, the compensated image spacing becomes approximately:
100 µm − 10 µm − 10 µm = 80 µm
If the fabrication process cannot image and etch an 80 µm production space reliably, the original 100/100 µm design may fall outside the process window even though the submitted Gerber viewer shows 100 µm spacing.
Possible design changes include:
- Reducing copper thickness
- Increasing the designed spacing
- Increasing the designed trace width
- Changing the layer assignment
- Moving the fine-pitch breakout to a different structure
- Using another fabrication process
- Revising the stackup or layer count
Etch compensation cannot create missing physical space.
PCB Etch Factor And Controlled Impedance
PCB etch factor can influence controlled impedance because the etching process changes the trace width and conductor cross-section.
Impedance depends on several connected variables:
- Finished trace width
- Top and bottom conductor widths
- Copper thickness
- Dielectric thickness
- Dielectric properties
- Distance to the reference plane
- Solder mask
- Differential-pair gap
- Etched sidewall shape
Therefore, an impedance calculation that assumes a rectangular trace may not match a finished trapezoidal conductor.
A practical controlled impedance PCB workflow should use the manufacturer’s proposed stackup and realistic finished conductor geometry. For critical designs, the manufacturer can then connect the predicted geometry with coupon measurements and production inspection.
Differential Pairs Need Additional Attention
CAM compensation may increase both conductors in a differential pair while reducing the space between them.
That change can affect:
- Single-ended impedance
- Differential impedance
- Coupling
- Insertion loss
- Crosstalk
- Pair-to-pair clearance
As a result, the manufacturer should not independently alter a critical differential-pair gap without checking the impedance model and obtaining approval when necessary.
What Controls PCB Etch Factor In Production?
PCB etch factor does not come from copper thickness alone. Several process variables influence the final conductor profile.
Copper Depth To Remove
More copper generally requires a longer or more aggressive etching process. Therefore, thicker copper usually creates a more difficult fine-line manufacturing problem.
Etchant Condition
The manufacturer must control factors such as:
- Chemical concentration
- Copper loading
- pH
- Temperature
- Oxidation state
- Contamination
- Replenishment rate
Changes in chemistry can alter vertical and lateral etching rates.
Spray And Conveyor Conditions
Spray pressure, nozzle condition, panel orientation, conveyor speed, and solution flow affect how quickly fresh chemistry reaches the copper surface.
Therefore, different panel areas or feature orientations may not respond identically when the equipment lacks adequate uniformity.
Imaging And Resist Quality
Resist thickness, exposure, development, adhesion, and edge definition affect the protected copper geometry before etching begins.
As a result, a width difference does not always come from etching alone.
Copper Distribution
Dense copper areas and isolated fine features can interact differently with plating and etching processes. Panel position may also influence the result.
Outer-Layer Plating
Outer-layer processing adds plating variables before final etching. Uneven plating can change both the conductor thickness and the amount of exposed copper that the etching process must clear.
For these reasons, a manufacturer should establish compensation by layer type and validated production condition rather than using one internet value.
When Does Etch Compensation Need Customer Approval?
Manufacturers commonly apply process compensation during CAM preparation. However, the customer should approve the change when it can alter an electrical, safety, or functional requirement.
Approval becomes important when compensation affects:
- Controlled-impedance trace width
- Differential-pair spacing
- RF filters, antennas, or couplers
- High-voltage clearance
- Creepage-related copper geometry
- Minimum BGA breakout spacing
- Fine-pitch component pads
- Thermal-relief spokes
- Copper neck-down areas
- Edge-connector geometry
- Current-carrying conductor width
- Customer-controlled artwork dimensions
The approval record should show:
- The original geometry
- The proposed compensated geometry
- The affected layers and locations
- The remaining production spacing
- The electrical or mechanical consequence
- The customer’s disposition
A vague statement such as “factory optimization applied” does not provide enough traceability for critical geometry.
What Evidence Should A PCB Buyer Request?
A buyer does not normally need the manufacturer’s complete proprietary etching recipe. Nevertheless, the buyer should request evidence that connects design intent with finished-board acceptance.
| Evidence | What It Should Confirm |
|---|---|
| DFM Report | Minimum trace and spacing after proposed CAM compensation |
| Stackup | Base copper, plating, and finished copper by layer |
| CAM Change Record | Material geometry changes that need approval |
| Width Definition | Whether the requirement applies to top, bottom, minimum, or average width |
| AOI Or Dimensional Result | Pattern integrity and relevant feature measurements |
| Microsection | Copper thickness and conductor cross-section at defined samples |
| Impedance Coupon Result | Electrical result after fabrication |
| Nonconformance Record | Location, measurement method, and deviation |
IPC’s printed-board acceptability training identifies conductor width and spacing among the inspection subjects that connect IPC-A-600 with PCB performance specifications. However, the purchase documentation must still define the project-specific requirement and applicable revision. IPC-A-600 Acceptability Overview
Define What “Finished Width” Means
For ordinary circuitry, a drawing may reference the minimum acceptable finished conductor width under the applicable acceptance specification.
For a critical RF or impedance trace, the buyer may need more detail:
- Nominal target
- Minimum and maximum width
- Top and bottom measurement
- Cross-section location
- Sampling plan
- Coupon requirement
- Electrical acceptance result
This definition prevents disputes after production.
What Haode Needs To Review PCB Etch Factor Risk
To review etching and compensation risk, provide:
- Gerber, ODB++, or IPC-2581 data
- Layer stackup
- Base copper by layer
- Finished copper by layer
- Minimum trace and spacing by layer
- Controlled-impedance requirements
- Differential-pair geometry
- High-voltage clearance requirements
- RF-critical copper features
- Required conductor-width tolerance
- Inspection and coupon requirements
- Production quantity
- Applicable IPC class and revision
These inputs allow the engineering review to identify where compensation may reduce spacing or modify controlled geometry.
For critical features, the DFM response should answer four questions:
- What geometry did the customer submit?
- What production geometry does the proposed process require?
- What finished geometry will the manufacturer inspect?
- What evidence will confirm compliance?
The PCB DFM checklist should record these decisions before tooling release.
PCB Etch Factor Buyer Decision Table
| Design Condition | Main Risk | Recommended Action |
|---|---|---|
| Standard Copper With Generous Spacing | Low DFM conflict | Let the fabricator apply its validated standard compensation |
| Fine Trace And Spacing | Compensated spacing may become too small | Request a layer-specific DFM review |
| Heavy Copper | Larger lateral allowance may be necessary | Confirm minimum trace and spacing before layout release |
| Controlled Impedance | Width and cross-section affect impedance | Approve the production stackup and finished geometry |
| Differential Pairs | Compensation changes width and gap | Review both variables in the field solver |
| RF Geometry | Small dimensional changes may alter performance | Mark critical copper as customer-controlled |
| High-Voltage Circuit | Copper expansion may reduce clearance | Protect required electrical clearance explicitly |
| New Supplier Or Process | Historical compensation may not transfer | Request first-article and coupon evidence |
Frequently Asked Questions About PCB Etch Factor
Is A Higher PCB Etch Factor Always Better?
Under the definition used in this article, a higher value means less undercut for the same vertical etch depth. However, the number remains useful only when the manufacturer states the formula and measurement method.
Process stability and finished-board compliance matter more than an isolated high value.
Should Designers Add Etch Compensation To Gerber Files?
Usually, designers should submit the intended design geometry and let the selected manufacturer apply its validated process compensation.
If both the designer and manufacturer add compensation, the finished copper may become too wide and the remaining spacing may become too small. Therefore, document any precompensated data clearly.
Does One-Ounce Copper Always Use The Same Compensation?
No. The result also depends on actual copper construction, inner or outer layer processing, imaging, plating, chemistry, equipment, feature density, and the manufacturer’s process data.
Copper weight alone cannot define the production allowance.
Can Etch Compensation Fix Insufficient PCB Spacing?
No. Compensation consumes available spacing. If the compensated production image falls below the manufacturing limit, the designer may need to increase spacing, reduce copper thickness, change the stackup, or use a different fabrication process.
Does Etch Factor Directly Determine Trace-Width Tolerance?
Not by itself. Finished width also reflects imaging, development, plating, etching, material, inspection, and sampling variation.
Therefore, the drawing should specify the finished conductor requirement instead of relying only on an etch-factor value.
Final PCB Etch Factor Recommendations
PCB etch factor provides a useful way to describe lateral copper loss, but only after all parties agree on the definition.
For a manufacturable design:
- Define whether conductor width means the top, bottom, minimum, or average width.
- Review trace width and spacing as one connected constraint.
- Do not use one compensation value for every copper thickness or layer.
- Model controlled impedance with realistic finished conductor geometry.
- Require approval for changes to critical electrical or safety features.
- Submit intended geometry unless the manufacturer requests precompensated data.
- Record important CAM changes before tooling release.
- Use inspection, microsections, or impedance coupons when the application requires evidence.
- Treat online calculations as illustrations rather than production guarantees.
The most useful question is not “What is the universal PCB etch factor?”
Instead, ask:
For this layer, copper construction, and feature geometry, what production compensation will the manufacturer apply, how much spacing will remain, and how will the finished result be verified?
That question connects PCB etch factor with actual manufacturing risk, measurable acceptance, and design intent.
