PCB via filling should be specified by function, via location, fill material, final surface, and inspection requirement. A fabrication note that says only “fill vias” is incomplete because tented vias, resin-filled through vias, copper-filled microvias, and filled-and-capped via-in-pad structures are not interchangeable.
For most via-in-pad soldering applications, the plated via is filled with an approved resin, planarized, copper capped, and finished with the surrounding pad. Standard vias located away from solderable pads may need only tenting or solder mask coverage. Copper filling is normally associated with blind microvias, stacked HDI structures, or another defined electrical or thermal requirement.
The correct choice depends on what problem the via treatment must solve.
What Is PCB Via Filling?
PCB via filling is a fabrication process that places resin, solder mask, conductive paste, or deposited copper into a plated via structure.
Depending on the required result, the process may:
- Prevent solder from moving through the via
- Create a flat solderable pad
- Support via-in-pad construction
- Protect a via from contamination
- Prepare a buried via for sequential lamination
- Support stacked microvias
- Improve a vacuum or pressure interface
- Reduce assembly variation
- Create a copper-filled HDI interconnection
PCB via filling is different from simply covering the hole opening. A via can look closed from the surface while remaining substantially empty inside.
The drawing should therefore define the required internal and external condition rather than relying on appearance alone.
Filled Vias Are Still Plated Vias
For a conventional resin-filled plated through via, electrical connection is provided primarily by the copper barrel. The filling material is added after the hole has been drilled, metallized, and plated.
The resin does not replace the hole-wall copper.
A filled via can fail electrically if the copper barrel is cracked, thin, discontinuous, or poorly connected to an internal layer, even when the filling material appears complete.
Our plated through hole PCB article explains drilling, desmear, electroless copper, electroplating, and internal-layer connection.
Via Tenting Vs Plugging Vs Filling Vs Capping
These terms describe different finished structures, but commercial usage is inconsistent. One PCB supplier may use “plugged” to mean partially closed, while another uses it for a completely resin-filled via.
The purchase drawing should define the physical result.
| Via Treatment | Typical Finished Condition | Common Purpose | Main Limitation |
|---|---|---|---|
| Open Via | Hole and annular ring remain exposed | Test access, thermal arrays, ordinary interconnection | Can accept solder, flux, or contamination |
| Tented Via | Solder mask covers the opening | Low-cost surface protection | Closure may not be guaranteed |
| Plugged Via | Opening is partially filled or sealed | Reduce solder movement through the opening | Internal void remains |
| Filled Via | Hole is substantially filled | Solder control, lamination support, contamination protection | Surface may not be solderable or flat |
| Filled And Covered Via | Filled hole receives solder mask coverage | Protected nonsolderable via | Mask surface is not equivalent to a copper pad |
| Filled And Capped Via | Filled, planarized, and copper plated over | Via-in-pad and VIPPO | Higher cost and tighter process control |
| Copper-Filled Microvia | Copper is electroplated into a blind microvia | HDI, stacked structures, compact interconnection | Requires specialized plating capability |
Why Tenting Is Not Guaranteed Filling
Via tenting normally uses solder mask to cover a hole opening. The liquid coating can bridge some small openings, but mask behavior depends on:
- Finished hole diameter
- Mask viscosity
- Coating method
- Surface tension
- Cure process
- Board thickness
- Via aspect ratio
- Whether one or both sides are covered
A tented via should not automatically be treated as hermetically sealed, completely filled, or suitable for soldering directly on top.
The PCB solder mask article explains mask openings, dams, registration, tenting, plugging, and design documentation.
Why Filling Alone Is Not A Solderable Pad
Resin filling can leave:
- A depression
- A raised plug
- Exposed resin
- A grinding mark
- A small void
- A discontinuity between the fill and surrounding copper
If a component will be soldered over the via, the filled structure normally needs planarization and copper capping. The final surface finish is then applied to the complete pad.
How IPC-4761 Via Types Are Used
IPC-4761 established widely recognized terminology for protecting printed-board via structures.
| IPC-4761 Type | General Description |
| Type I | Tented Via |
| Type II | Tented And Covered Via |
| Type III | Plugged Via |
| Type IV | Plugged And Covered Via |
| Type V | Filled Via |
| Type VI | Filled And Covered Via |
| Type VII | Filled And Capped Via |
The document remains useful as a common vocabulary. However, IPC describes it as a design guide rather than a complete project-specific acceptance specification. The official IPC document revision table currently lists IPC-4761 as “No Longer Maintained.”
This distinction matters.
Writing only “IPC-4761 Type VII” may communicate the intended general structure, but it does not automatically define:
- Which vias receive the treatment
- Fill material
- Permitted material substitutions
- Fill completeness
- Internal void acceptance
- Surface depression
- Copper cap requirement
- Cap thickness
- Finished pad flatness
- Inspection method
- Sampling plan
- Thermal conditioning
- Applicable PCB performance class
- Conflict resolution between drawing and supplier capability
Use the IPC type as shorthand, then add the measurable requirements needed by the actual product.
The original IPC-4761 product page identifies the document as the Design Guide for Protection of Printed Board Via Structures.
When Does PCB Via Filling Add Real Value?
PCB via filling should solve an identified manufacturing, assembly, electrical, thermal, or environmental problem.
| Design Condition | Usually Suitable Treatment | Reason |
| Small Standard Via Away From SMT Pads | Open Or Tented | Filling may add cost without improving function |
| Via Close To A Solderable Pad | Tented, Covered, Or Filled | Helps limit solder migration |
| Via Directly Inside An SMT Pad | Filled, Planarized, And Copper Capped | Creates a continuous solderable surface |
| Through Via Under Fine-Pitch BGA | VIPPO After Supplier Review | Prevents solder loss and supports pad coplanarity |
| Buried Via Before Additional Lamination | Filled As Required By Stackup | Prevents resin loss and supports lamination |
| Stacked Blind Microvias | Electrolytic Copper Filling Commonly Required | Supports the next via level and electrical connection |
| Thermal Via Array In Exposed Pad | Open, Tented, Resin-Filled, Or Copper-Filled After Thermal And Assembly Review | The best option depends on stencil design and heat path |
| Vacuum Fixture Interface | Verified Closure Or Filling | An ordinary tent may leak |
| High-Voltage Area | Application-Specific Review | Filling does not replace creepage, clearance, or insulation design |
| Product Exposed To Contamination | Filled And Covered If Justified | Can reduce entry paths but does not replace cleaning or coating |
When Filling Is Usually Unnecessary
Filling every via can increase price and lead time without improving reliability.
Standard signal vias may remain open or tented when they:
- Are not located in solderable pads
- Are sufficiently separated from paste deposits
- Do not interfere with vacuum tooling
- Do not create contamination concerns
- Are not part of a sequential lamination structure
- Do not need a flat surface
- Do not require a verified pressure seal
A DFM review should identify only the via population that requires special treatment.
PCB Via Filling For Via-In-Pad
Via-in-pad places a via directly inside a component land. This can improve routing density, shorten electrical paths, and support thermal transfer.
An open via inside the pad can pull molten solder or solder paste into the hole. Possible results include:
- Insufficient solder volume
- Uneven component seating
- BGA opens
- Void variation
- Solder protrusion on the opposite side
- Poor paste release
- Unstable inspection results
- Rework difficulty
For a solderable via-in-pad structure, the typical process is:
- Drill or laser-form the via.
- Metallize and plate the via.
- Fill the via with the approved process.
- Cure the filling material when resin is used.
- Remove excess material.
- Planarize the surface.
- Copper cap the via.
- Form the final pad image.
- Apply the specified surface finish.
- Inspect the finished structure.
This construction is commonly called VIPPO, meaning via in pad plated over.
Our dedicated Via In Pad article explains BGA fanout, pad construction, copper capping, surface flatness, and VIPPO manufacturing in greater detail.
Do Not Specify Only “Filled Via In Pad”
Filling without capping may still leave exposed resin or a surface depression. That condition can affect stencil sealing, paste volume, solder wetting, and package coplanarity.
If the component will be soldered over the via, specify the required finished pad rather than only the hidden fill.
PCB Via Filling Materials
The correct filling material depends on the via structure and its function.
Solder Mask Fill
Some conventional vias can be filled or closed using solder mask material.
This may be suitable when the primary objective is economical surface protection. However, solder mask fill should not automatically be used for:
- VIPPO pads
- High-aspect-ratio complete filling
- Demanding planar surfaces
- Copper-capped structures
- High-reliability sequential lamination
- Applications requiring verified void-free filling
A supplier’s normal “via plugging” process may use a dedicated plugging ink rather than the same LPI solder mask applied to the board surface. The quotation should identify the actual material category.
Non-Conductive Epoxy Resin
Non-conductive resin is commonly used for filled and capped plated through vias.
Its advantages can include:
- Stable filling process
- Compatibility with planarization
- Support for copper capping
- Lower cost than many conductive fillers
- Suitable mechanical support for via-in-pad
- Reduced solder movement through the via
Although the material is electrically non-conductive, the plated copper barrel still carries current between layers.
The manufacturer should approve the resin for the board material, via dimensions, cure cycle, surface finish, and thermal exposure.
Conductive Epoxy
Conductive epoxy contains metallic particles or another conductive phase.
It may be requested for a defined electrical or thermal reason, but it should not be selected automatically for every via-in-pad structure.
Potential considerations include:
- Material cost
- Thermal expansion
- Cure behavior
- Planarization
- Adhesion
- Compatibility with copper capping
- Long-term thermal cycling
- Actual rather than assumed thermal benefit
A “conductive” label does not mean the filler performs like solid electroplated copper.
The designer should compare the complete thermal path, including component pad, copper barrel, planes, board material, heat sink, and airflow.
Electrolytic Copper Fill
Blind microvias can be filled through controlled copper electroplating. This is fundamentally different from inserting an epoxy paste into a plated through hole.
Copper filling may support:
- HDI any-layer construction
- Stacked microvias
- Solderable microvia pads
- High-density interconnection
- Reduced microvia depression
- Improved vertical thermal conduction
- Sequential build-up structures
The process depends on microvia geometry, surface distribution, plating chemistry, equipment, current density, and bath control.
MKS Atotech describes dedicated electrolytic copper filling processes for blind microvias, through holes, HDI structures, and advanced multilayer boards.
Do Not Allow Unapproved Substitution
The following processes should not be treated as automatically equivalent:
- Solder mask plugging
- Dedicated non-conductive resin filling
- Conductive epoxy filling
- Copper paste filling
- Electrolytic copper filling
- Resin filling with copper capping
If material or process type affects performance, the fabrication drawing should prohibit substitutions without written approval.
PCB Via Filling For Thermal Pads
Thermal via arrays are commonly placed under QFNs, power ICs, LEDs, regulators, and exposed thermal pads.
Filling can help prevent solder from draining through the holes, but the best solution depends on the product.
Open Thermal Vias
Open vias are economical and can provide a direct plated thermal path. However, solder may wick into them during reflow.
The assembler may compensate through:
- Smaller stencil apertures
- Segmented paste deposits
- Reduced via diameter
- Via placement away from critical paste regions
- Controlled paste volume
- Bottom-side mask treatment
Tented Thermal Vias
Tenting the opposite side may reduce solder escape but can trap gases or process residues if the structure is poorly designed.
A tent does not create a flat top-side pad when the via opening remains inside the solderable area.
Resin-Filled And Capped Thermal Vias
This construction provides a flatter assembly surface and retains solder at the component pad.
The main thermal path is still influenced by:
- Hole-wall copper
- Via count
- Via diameter
- Connected copper planes
- Pad area
- Board thickness
- Laminate conductivity
- Heat-sink interface
- Airflow
Copper-Filled Thermal Vias
Copper-filled microvias or through holes may improve through-thickness conduction, but they also increase manufacturing complexity and cost.
The decision should be based on a thermal model or measured prototype, not the assumption that every power component needs conductive via filling.
How The PCB Via Filling Process Works
The manufacturing sequence depends on whether the via is resin-filled or copper-filled.
Resin-Filled Plated Through Via Process
A typical sequence includes:
- Drill the PCB.
- Remove drilling residue and resin smear.
- Deposit electroless copper.
- Electroplate the hole wall.
- Clean and prepare the via.
- Apply filling material under controlled conditions.
- Cure the resin.
- Remove excess fill.
- Planarize the surface when required.
- Add copper capping for filled-and-capped structures.
- Continue outer-layer imaging and plating.
- Apply solder mask and surface finish.
- Inspect representative structures.
The exact sequence varies with the manufacturer’s production flow and board construction.
Copper-Filled Microvia Process
A typical blind-microvia sequence includes:
- Laminate the target build-up dielectric.
- Laser-drill the blind microvia.
- Clean and condition the via.
- Deposit the initial conductive layer.
- Electroplate copper into the microvia.
- Control voids, inclusions, and surface depression.
- Prepare the surface for the next circuit or lamination level.
- Repeat the sequence when the approved HDI stackup requires additional levels.
Copper filling must produce a usable surface while controlling unwanted copper buildup across the panel.
Why Process Order Matters
A drawing that requests resin filling before the via has been properly plated would misunderstand the electrical structure.
Likewise, copper capping should not be confused with surface finish. ENIG, ENEPIG, immersion silver, OSP, or another finish is applied after the copper pad has been formed.
How To Specify PCB Via Filling
A complete PCB via filling requirement should answer six questions:
- Which vias must be filled?
- Why are they being filled?
- What material or process is required?
- Must the via be covered or copper capped?
- What finished surface condition is needed?
- How will the result be inspected and accepted?
Identify The Exact Via Population
Do not rely on the manufacturer to guess from component locations.
Identify filled vias through one or more of the following:
- Dedicated fabrication layer
- ODB++ or IPC-2581 attributes
- Separate drill tool
- Controlled hole table
- Via-coordinate list
- Drawing detail
- Stackup note
- Clearly named Gerber layer
- Approved marked-up image
The layer name should communicate its function, such as:
VIA_RESIN_FILLVIA_FILL_AND_CAPBGA_VIPPOCOPPER_FILLED_MICROVIAVIA_TENT_TOPVIA_TENT_BOTH
A file containing filled-via coordinates must use the same origin, units, revision, and orientation as the drill and copper data.
Define The Via Structure
State whether the requirement applies to:
- Plated through vias
- Blind vias
- Buried vias
- Laser microvias
- Stacked microvias
- Staggered microvias
- Via-in-pad holes
- Thermal vias
- Selected BGA fanout vias
Different structures may require different filling processes on the same PCB.
Define The Final Surface
The drawing should clarify whether the via surface must be:
- Open
- Tented
- Solder-mask covered
- Resin exposed
- Planarized
- Copper capped
- Plated over as part of an SMT pad
- Compatible with the specified surface finish
“Filled” does not automatically mean “flat,” “covered,” or “solderable.”
Define Acceptance And Evidence
When the structure is critical, specify:
- Applicable PCB performance specification and revision
- Project-specific fill acceptance
- Surface depression requirement
- Copper cap requirement
- Microsection sampling
- Coupon construction
- Thermal conditioning
- First-article report
- Required photographs
- Lot traceability
- Approval process for deviations
Do not copy a cap-thickness, dimple, or void percentage from a general online article without confirming the applicable standard and production capability.
Example PCB Via Filling Notes
The following examples are starting templates. Dimensions, materials, sampling, and acceptance values must be approved for the actual design.
Example 1: Filled And Covered Standard Vias
Fill the plated through vias identified on layer VIA_RESIN_FILL with an approved non-conductive resin. Apply solder mask coverage on both sides. Do not substitute ordinary via tenting for the specified filling process. Submit material identification and filling capability for approval before production.
This note may suit vias that need controlled closure but will not form part of a solderable component pad.
Example 2: Filled And Capped Via-In-Pad
Resin-fill, cure, planarize, and copper-cap all plated vias identified on layer BGA_VIPPO. The completed surface shall form a continuous solderable component pad compatible with the specified final finish. Inspect representative production coupons by microsection and report fill condition, surface depression, and cap integrity against the approved acceptance criteria.
This note defines the required finished pad rather than only asking for “filled vias.”
Example 3: Copper-Filled Blind Microvias
Electrolytically copper-fill the laser microvias defined in the approved HDI stackup and drill table. Epoxy, solder-mask, or conductive-paste substitution is not permitted. Inspect representative stacked structures by microsection after the specified conditioning. Report fill condition, interface quality, surface depression, and registration.
This note separates copper-filled microvias from resin-filled plated holes.
Why “Fill All Vias” Is A Poor Note
A blanket instruction may accidentally include:
- Test vias
- Open probe targets
- Thermal arrays
- Press-fit holes
- Component holes
- Holes needed for soldering access
- Vias that do not support the selected fill process
- Structures that should remain open for later processing
It can also increase cost unnecessarily.
How PCB Via Filling Is Inspected
No single inspection method reveals every possible defect.
Surface Inspection
Visual or automated inspection can identify:
- Exposed holes
- Incomplete surface coverage
- Raised plugs
- Large depressions
- Damaged pads
- Residual resin
- Solder mask cracks
- Surface-finish discontinuity
Surface inspection cannot confirm the full internal condition of the via.
Planarity Measurement
A profilometer, optical system, or other suitable instrument can measure local surface variation.
Planarity matters for:
- BGA pads
- LGA pads
- QFN thermal pads
- Small passive pads
- Fine-pitch land patterns
- Probe and contact surfaces
The inspection report should define the measurement location and reference plane.
PCB Microsection Analysis
Microsectioning exposes the via structure and may reveal:
- Internal fill voids
- Resin separation
- Copper cap condition
- Hole-wall copper
- Barrel cracks
- Internal-layer connections
- Microvia interfaces
- Copper-fill inclusions
- Surface depression
- Plating adhesion
- Delamination
Because one cross section represents only a narrow plane, coupon design and sample selection matter.
Our PCB microsection analysis article explains sample preparation, section location, imaging, reporting, and interpretation.
X-Ray Inspection
X-ray may reveal some density differences, gross voiding, misregistration, or solder-related conditions. Its effectiveness depends on board thickness, copper overlap, via orientation, equipment resolution, and image angle.
X-ray should not automatically replace microsectioning for via-fill qualification.
Electrical Testing
Bare-board electrical testing confirms connectivity and isolation. It may detect a broken barrel or short circuit, but it does not prove that a via has the correct fill material, cap structure, or internal void condition.
Thermal Conditioning
Critical structures may be inspected before and after an approved thermal-stress, reflow-simulation, or thermal-cycling procedure.
The test conditions should come from the applicable specification or qualification plan. An arbitrary excessive test can damage an acceptable product or create results unrelated to service conditions.
Common PCB Via Filling Defects
| Defect | Possible Cause | Manufacturing Or Assembly Risk |
| Incomplete Fill | Poor material flow, unsuitable geometry, trapped air | Solder migration, contamination path, weak cap support |
| Internal Void | Air entrapment, cure behavior, process instability | Expansion, cracking, uncertain thermal behavior |
| Surface Dimple | Resin shrinkage, insufficient fill, planarization variation | Uneven paste deposit or component seating |
| Raised Plug | Excess fill or inadequate planarization | Stencil interference and placement-height variation |
| Exposed Resin In Pad | Missing or damaged copper cap | Poor solderability |
| Copper Cap Crack | Weak interface, thermal stress, inadequate process control | Intermittent electrical connection or solder-joint failure |
| Cap Delamination | Contamination or poor adhesion | Pad lifting and assembly failure |
| Resin Smear | Inadequate cleaning after planarization | Surface-finish or solderability defects |
| Solder Mask Blister | Trapped gas, contamination, cure problem | Exposed copper or loose mask particles |
| Barrel Damage | Excessive grinding or unstable filling process | Reduced copper integrity |
| Copper-Fill Inclusion | Plating chemistry or process-control problem | Microvia reliability risk |
| Mixed Via Treatment | Incorrect data interpretation | Some vias remain open or receive the wrong process |
Why A Surface-Closed Via Can Still Be Defective
A via can pass visual inspection while containing a large internal void. Conversely, a small internal indication may have different significance depending on its size, position, surrounding copper, and applicable acceptance criteria.
The report should record measurable evidence rather than simply stating that the via “looks filled.”
How PCB Via Filling Affects Assembly
The fabrication decision becomes valuable only when it improves the assembly process or final product.
Solder Paste Printing
A flat copper-capped pad supports consistent stencil contact and paste release.
A depression can change local paste volume. A raised plug can lift the stencil and affect several neighboring pads.
Reflow Soldering
Open vias may pull molten solder away from the intended joint. Trapped gases or unstable fill structures may also react during heating.
The risk depends on:
- Via position
- Hole diameter
- Pad geometry
- Paste volume
- Alloy
- Thermal profile
- Component termination
- Board orientation
- Number of reflow cycles
BGA And LGA Assembly
Area-array packages require stable pad geometry and solder volume. A poorly capped via-in-pad can contribute to:
- Non-wet opens
- Uneven ball collapse
- Head-in-pillow risk
- Solder void variation
- Intermittent joints
- Difficult X-ray interpretation
Wave And Selective Soldering
Open or inadequately protected vias may allow solder to travel through the board and appear in an unintended area.
Filled and covered structures can help when the actual soldering process justifies them, but via treatment should be coordinated with pallet design, flux application, preheat, and nozzle access.
Vacuum Testing And Conformal Coating
A tented via may not provide a verified vacuum seal. Similarly, via filling does not automatically eliminate every path for moisture or ionic contamination.
Products requiring leakage control should define an actual leak-test requirement.
How PCB Via Filling Affects Cost
PCB via filling cost depends on more than the number of holes.
Important quotation factors include:
- Via type
- Finished diameter
- Board thickness
- Via aspect ratio
- Number of fill classes
- Via quantity
- Via distribution
- Panel size
- Fill material
- One-side or two-side processing
- Cure cycle
- Planarization
- Copper capping
- Surface finish
- Sequential lamination
- Copper-filled microvia requirements
- Inspection and coupon requirements
- First-article reporting
- Production volume
- Supplier process capability
Typical Cost Progression
From lower to higher manufacturing complexity, the sequence is often:
- Open vias
- Solder mask tenting
- Plugged or filled-and-covered vias
- Resin-filled and copper-capped through vias
- Copper-filled blind microvias
- Complex stacked HDI via structures
This order is not a universal price table. Panel design, equipment, volume, and supplier capability can change the result.
Selective Filling Can Control Cost
If only the BGA vias need filling and capping, identify that via set separately. Do not impose the same treatment on every ordinary signal via unless required.
A selective requirement can reduce material use, planarization work, inspection load, and quotation uncertainty.
PCB Via Filling DFM Questions
Before releasing the design, confirm:
- What functional problem does the filling solve?
- Which exact vias need treatment?
- Are the vias mechanically drilled or laser drilled?
- Are they through, blind, buried, stacked, or staggered?
- Is solder applied directly over the via?
- Must the surface be copper capped?
- Is solder mask coverage also required?
- What filling material is approved?
- Are substitutions permitted?
- Does the manufacturer support the hole diameter and aspect ratio?
- Is the design compatible with planarization?
- Is the cap compatible with the final surface finish?
- Will the via experience one or multiple reflow cycles?
- Does the via need thermal, vacuum, or pressure performance?
- Are test vias or probe points accidentally included?
- Is a dedicated fill layer provided?
- Is the applicable standard revision identified?
- Are project-specific acceptance criteria defined?
- Is microsection inspection required?
- Does the coupon represent the production via?
- Has the assembler reviewed the finished pad condition?
- Has the supplier priced only the necessary via population?
These checks can be included in a broader PCB DFM review.
What Buyers Should Include In A PCB Via Filling RFQ
A complete RFQ should provide:
- PCB part number and revision
- Gerber, ODB++, or IPC-2581 data
- Fabrication drawing
- Approved stackup
- Drill and route files
- Controlled hole table
- Dedicated via-fill layer
- Via type and finished diameter
- Board thickness
- Via aspect ratio
- Fill material requirement
- Approved material alternatives
- IPC-4761 type when used as terminology
- Required final surface condition
- Copper-capping requirement
- Surface finish
- Applicable IPC performance specification and revision
- Project-specific acceptance criteria
- Inspection method
- Coupon requirements
- Sample quantity
- Thermal conditioning
- First-article reporting
- Assembly process
- BGA, LGA, QFN, or thermal-pad locations
- Prototype quantity
- Production quantity
- Annual forecast
The supplier should return:
- Proposed filling process
- Material category
- Supported via dimensions
- Expected surface condition
- Copper-capping process
- Inspection plan
- Coupon proposal
- Exceptions
- Lead-time impact
- Non-recurring engineering cost
- Production price impact
How To Approve PCB Via Filling During First Article Inspection
First-article approval should connect drawing requirements with measurable evidence.
Confirm The Data Interpretation
Verify that the manufacturer selected the correct via coordinates, hole tools, layers, and board revision.
Review The Process And Material
Record:
- Fill process
- Fill material
- Material manufacturer or controlled internal designation
- Cure process
- Planarization method
- Copper-capping process
- Surface finish
- Approved deviations
Inspect The Finished Surface
Check representative component pads for:
- Flatness
- Exposed resin
- Copper continuity
- Surface-finish coverage
- Depressions
- Raised areas
- Solder mask damage
Review Microsections
Sections should represent the most demanding structures, which may include:
- Largest hole
- Smallest hole
- Highest aspect ratio
- Via-in-pad
- Panel edge
- Panel center
- Stacked microvia
- Thermal via
- Different filling classes
Verify Assembly Performance
First-article assembly should evaluate:
- Solder paste deposits
- Component placement
- Reflow behavior
- BGA or LGA X-ray results
- Thermal-pad soldering
- Opposite-side solder protrusion
- Electrical test
- Mechanical or vacuum performance when applicable
A filled via should not be approved solely because the bare board passed electrical testing.
Frequently Asked Questions About PCB Via Filling
Is PCB Via Filling The Same As Via Tenting?
No. Tenting covers a via opening with solder mask. Filling places material inside the via. A tented via may remain internally open and its surface closure may not be guaranteed.
Is PCB Via Filling Required For Every Via?
No. Ordinary vias away from solderable pads may remain open or tented. Fill only the vias that require solder control, planarization, lamination support, environmental protection, or another defined function.
What Is The Best Material For PCB Via Filling?
There is no universal best material. Non-conductive resin is common for resin-filled and capped through vias. Electrolytic copper is used for many filled blind microvias. Conductive epoxy should be selected only when its properties solve an identified requirement.
Do Non-Conductive Filled Vias Still Conduct Electricity?
Yes. The plated copper barrel provides the layer-to-layer electrical connection. The resin filling material does not replace the copper plating.
Does Via-In-Pad Always Need Filling?
A via located in a solderable component pad normally needs an approved method that prevents solder loss and creates a suitable pad surface. Filled, planarized, and copper-capped construction is common. The exact requirement depends on component, via, pad, and assembly design.
Is Filling Enough For Via-In-Pad?
Usually not when the component must be soldered directly over the via. The filled via commonly needs planarization and copper capping to create a continuous solderable surface.
Is IPC-4761 Still Current?
IPC continues to make the original document available, and its Type I–VII terminology remains widely used. However, IPC’s official revision table marks IPC-4761 as “No Longer Maintained.” Use its terminology with project-specific construction and acceptance requirements.
Is Type VII The Same As VIPPO?
Type VII describes a filled-and-capped via structure and is commonly associated with VIPPO. The drawing should still define the via population, material, final pad condition, surface finish, and inspection requirements.
Can Solder Mask Be Used To Fill A Via?
It can be used for some plugging or covering applications, depending on hole dimensions and supplier capability. It should not automatically replace dedicated resin filling or a copper-capped via-in-pad process.
Are Conductive Filled Vias Better For Heat Transfer?
They may reduce part of the thermal resistance, but total performance depends on the complete heat path. Copper barrel area, planes, via count, board thickness, component interface, and cooling system must also be considered.
Can X-Ray Verify Filled Vias?
X-ray can reveal some gross internal conditions, but overlapping copper and board thickness can limit interpretation. Microsectioning is commonly used when the internal fill, cap, or microvia interface must be evaluated directly.
Does Electrical Testing Prove The Via Fill Is Acceptable?
No. Electrical testing verifies connectivity and isolation. It does not prove fill completeness, material identity, cap integrity, or surface planarity.
Why Did The Supplier Quote Via Filling Separately?
Filling can require dedicated material, equipment, cure cycles, planarization, copper capping, extra inspection, and additional process control. Cost also depends on via geometry, quantity, and panel design.
Final Recommendations For PCB Via Filling
Reliable PCB via filling begins with a functional requirement, not a generic fabrication note.
For the best result:
- Identify the exact via population.
- Separate tenting, plugging, filling, and capping.
- Distinguish resin filling from electrolytic copper filling.
- Define whether the surface must be solderable.
- Specify copper capping for applicable via-in-pad structures.
- State the approved material and substitution rules.
- Use IPC-4761 terminology only as part of the requirement.
- Add project-specific acceptance criteria.
- Confirm the manufacturer’s supported geometry.
- Use representative coupons and microsections.
- Verify assembly performance during first article production.
- Fill only the vias that genuinely need the process.
The essential relationship is:
Via Function → Required Internal Fill → Required Surface Condition → Inspection Evidence → Assembly And Product Reliability
When those five elements are defined, the PCB manufacturer can quote, build, inspect, and document the intended structure without guessing what “fill vias” means.
